1. Field of the Invention
This invention relates in general to semiconductor devices and more specifically to a method for separating structures of a semiconductor device.
2. Description of the Related Art
The isolation of structures in a semiconductor device may be performed using photo lithography techniques where the spacing is defined by the overlay and feature size permitted by the photolithography and etch process. Overlay between layers typically does not allow for the isolation of regions within sub-lithographic dimensions.
What is needed is an improved process for separating structures of a semiconductor device.
The use of the same reference symbols in different drawings indicates identical items unless otherwise noted.